The present invention relates to photolithographic masks. The present invention relates to photolithographic masks for the patterning of radiation-sensitive resist layers on semiconductor substrates for the fabrication of large scale integrated semiconductor components.
In the course of the ever decreasing structure dimensions for the production of large scale integrated semiconductor components, a dimensionally accurate photolithographic transfer of mask structures to radiation-sensitive resist layers becomes more and more important. Semiconductor components are fabricated with structure line widths of 180 nm or less for commercial use in large volumes, so that the requirements made of the patterning processes must satisfy very high standards. The photolithographic transfer of mask structures to radiation-sensitive resist layers is one of the outstanding techniques for patterning layers on semiconductor components.
The photolithographic transfer or mask structures to a radiation-sensitive resist layer is effected in a plurality of processes. The alignment of the mask above the substrate covered with the radiation-sensitive resist layer is followed by the exposure of the radiation-sensitive resist layer through the mask for marking the resist layer material to be removed (or to be left). The exposure of the radiation-sensitive resist layer can be effected in the silhouette method, the mask bearing on the resist layer (contact exposure) or being applied closely above the resist layer (proximity exposure). For very high resolution patterning, on the other hand, the exposure is carried out by using a projection exposure. The light that has passed through the mask is focused in a projection objective onto the resist layer, the projection objective imaging the maximum possible number of higher orders of diffraction produced by the mask structure. This imaging method makes it possible to image a minimum transferable structure line width bmin ofbmin=k1(λ/NA)  (1)
from the mask onto the resist layer. λ is the wavelength with which exposure is effected, and NA is the numerical aperture, i.e. essentially the ratio of half the lens window diameter to the distance between wafer and lens; in the region of the resolution limit, the proportionality constant k1 adopts values k1<0.5, and special measures have to be taken to increase the contrast, in order to ensure a sufficient process window for the lithography.
If the radiation-sensitive resist layer is a positive resist layer, then the exposure brings about at the exposed locations a chemical alteration of the resist layer material, which can be flushed out from the resist layer during development. By contrast, if the radiation-sensitive resist layer is a negative resist layer, then the non-exposed material is flushed out during development. In order to obtain the same structure as in the case of the positive resist, the mask must be patterned essentially complementarily with respect to the mask for the positive resist.
The exposure and further processes, such as the initiation of the “PAG” (photo acid generator), the “PEB” (post exposure bake) and the adjustment of the diffusion gradient and therefore of the resist profile, is followed by the development of the resist layer by spraying or dripping on developer liquid which selectively strips away (or selectively leaves resistant) the marked resist layer material. After the drying of the substrate, the patterned resist is finally obtained, which, in conclusion, is generally subjected to a thermal process for curing.
The minimum structure line width on the mask which is actually produced after the production of the resist structure is greater than that calculated from (1), for a number of reasons. The resist layer has a finite thickness, so that the imaging blurs slightly; furthermore, the developer acts isotropically, so that the resist is also removed in the lateral direction during the development of the resist layer. The minimum structure line width on the mask which is required for the production of a resist layer structure on a semiconductor substrate therefore depends on many parameters and is determined individually for each patterning process.
The mask includes e.g., an unpatterned quartz glass substrate which is light-transmissive even in the UV region and on which a thin opaque layer, usually made of black chromium, is applied. The black chromium layer produces, together with the transmissive regions, the mask structure which is imaged onto the resist layer. The black chromium layer produces the darkened regions on the resist layer, while the light-transmissive region produces the exposed regions on the resist. If the resist is positive, the rate at which the resist is removed in the developer is drastically increased in the exposed regions compared to the unexposed regions and the development process leads to the removal of material. If the resist is negative, the resist crosslinks in the exposed regions, so that predominantly the unexposed regions are removed during the development. Furthermore, for dimensionally accurate feature transfer, it is important to ensure a homogeneous exposure dose over the region to be exposed.
Various effects can contribute to impairing the dimensional fidelity. The finite resist contrast γ, which is a measure of the resist removal gradient for a given exposure dose, causes rounding of originally cornered mask structures. Furthermore, interference effects, diffraction effects and scattered light which arise at structure elements of the mask, the resist layer and/or the prepatterned substrate surface can result in the effective exposure dose not being homogeneous in the resist layer regions.
The defraction and interference effects of mask features which lie close together, known as proximity effects, can significantly impair the dimensional accuracy which can be achieved. The closer together the features lie, the more pronounced the proximity effects become. The result of this, for example, is that features which should actually be of the same size are reproduced differently in the resist layer according to what surrounds them. This difference is particularly evident between features which are arranged very close together and features which are substantially isolated without adjacent features.
To substantially compensate for this difference, it is customary to use assist features, known as scattering bars or SRAFs=sub resolution assist features, which are arranged in the vicinity of isolated features. Accordingly, a structure which is actually isolated now has a surrounding area which substantially corresponds to the area surrounding tightly packed features, so that substantially the same reproduction properties result. These assist features are formed on the mask in such a way that they are not themselves reproduced in the resist layer and they are in each case arranged in parallel to the edges of the actual features on the mask. Assist features of this type are described, for example, in U.S. Pat. Nos. 5,242,770 and 5,821,014.
The conventional assist features are particularly suitable for improving the reproduction properties of isolated features. However, it is quite possible that in the layout of a mask there may be features which are neither clearly isolated nor arranged particularly close together. For example, it is not always possible to make the distance between two gate paths so great that their associated assist features in each case fit between the gate tracks, or for the gate tracks to be laid so close together that they have sufficiently good reproduction properties even without assist features. For these cases, a single assist feature is generally placed in the center between the two gate tracks. However, this assist feature is generally not at the optimum distance from the gate tracks, and for many distance ranges it has scarcely any further enlarging effect on the focus process window in lithography. However, if these distance ranges are prohibited in design, this has adverse effects on design outlay and the chip size.